Die-stacking era is likewise known as 3-dimensional integrated circuits (3-d ics). The concept is to stack a couple of layers of included circuits (ics) vertically, and connect them collectively with vertical interconnections known as via-silicon vias (tsv). 3-d integration technology offer many blessings for ic designs. stacked dies Thailand Such blessings encompass: the discount in interconnect cord length, which leads to advanced overall performance and reduced strength intake; improved reminiscence bandwidth;the guide for the belief of heterogeneous integration, which can result in novel structure designs; smaller form elements, which ends up in higher
packaging density and smaller footprint because of the addition of a 3rd measurement to the traditional two dimensional format, and doubtlessly outcomes in a decrease price design. Therefore, 3-d integration technology is one of the promising solutions to conquer the boundaries in interconnect scaling, thereby providing an possibility to preserve overall performance improvements the usage of cmos era. Early die-stacking structure efforts
the three-d integration era has been an lively studies topics due to the fact that late 90s and early 2000s. Ibm was one of the pioneers to have a look at the process generation. As fabrication of three-d included circuits has become possible, developing eda equipment and architectural techniques is vital to discover the design area for processor layout using the 3-d era. Intel became the first to discover feasible directions to re-architect microprocessors with the die-stacking technology.
They first demonstrated a single middle processor partitioned into layers in 2004. 3 years later in 2007, intel tested a prototype 2-layer many-core processor, with 20mb sram stacked on pinnacle of the 80-center layer, supplying 1tb/s bandwidth between the reminiscence and the good judgment layer. The studies community turned into very excited to peer intel’s efforts, looking forward to business merchandise to be available quickly However, we didn’t see any real intel 3-d merchandise out in the market after intel’s demonstration in 2004 and 2007.
to cope with these challenges, one feasible answer is to step returned and undertake an interposer-based 2. 5d approach. In this technique, the design of the 3-d-stacked dram and the layout of good judgment die are decoupled. Memory companies (which include hynix) might recognition on designing many-layer 3-d stacked dram with an enterprise trendy (along with jedec’s hbm), whilst the processor companies (consisting of amd or nvidia) would consciousness on the design of the common sense dies.
as a precis, die-stacking technology turned into first investigated more than a long time ago, and inspired architects to explore various possible processor architectures and in the end became a main movement architecture. It rings a bell in my memory of the classic paper by way of john hennessy and norm jouppi “computing era and architecture: an evolving interaction”, published in 1991. Within the article, the authors claimed that the traits of technology affect selections architects make by means of influencing overall performance, value, and different machine attributes, and the traits in computer structure additionally effect the viability of various technology. read more